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ISL97671A
t FPWM
t PWMin
ILED0
t ON
t OFF
PWMI
60%
40%
t FPWM
(t PWMout )
ILED1
ILED1
t ON
60%
t OFF
40%
t D1
ILED2
ILED2
ILED3
ILED3
t D1
t D1
ILED4
ILED4
ILED5
FIGURE 20. NO DELAY (DEFAULT PHASE SHIFT DISABLED)
ILED1
t D2
When EqualPhase = 1(register 0x0A, bit 7), the phase shift evenly
spreads the channels switching across the PWM cycle, depending on
how many channels are enabled, as shown in Figures 21 and 22.
Equal phase means there are fixed delays between channels and
such delay can be calculated as Equation 12 in Figures 21 and 22.
t D1 = Fixed Delay with Integer only while the decimal value will be discarded (eg. 63.75=63)
FIGURE 22. 4 EQUAL PHASE CHANNELS PHASE SHIFT ILLUSTRATION
t FPWM
t D1 = ------------------- x ? ---------- ?
t FPWM 255
255 ? N ?
(EQ. 12)
ILED0
ILED1
t PD
t ON
t OFF
Equation 13 shows the phase delay between the last channel of
the current duty cycle and the first channel of the next duty cycle
in Figures 21 and 22.
ILED2
ILED3
t PD
t PD
t D2 = ------------------- x 255 – ( N – 1 ) ? ---------- ? ?
t FPWM ? 255
255 ? ? N ? ?
(EQ. 13)
ILED4
t PD
t PD
where (255/N) is rounded down to the nearest integer. For
example, if N = 6, (255/N) = 42, that leads to:
t D1 = t FPWM x 42/255
t D2 = t FPWM x 45/255
where t FPWM is the sum of t ON and t OFF . N is the number of LED
channels. The ISL97671A will detect the number of operating
channels automatically.
ILED5
FIGURE 23. PHASE SHIFT WITH 7-BIT PROGRAMMABLE DELAY
The ISL97671A allows the user to program the amount of phase
shift degree with 7-bit resolution, as shown in Figure 23. To
enable programmable phase shifting, the user must write to the
Phase Shift Control register with EqualPhase = 0 and the
desirable phase shift value of PhaseShift[6:0]. The delay
between CH5 and the repeated CH0 is the rest of the PWM cycle.
PWMI
60%
40%
Switching Frequency
ILED0
t D1
60%
40%
The default switching frequency is 600kHz but it can be selected
to 600kHz or 1.2MHz if the SMBus/I 2 C communications is used.
The switching frequency select bit is accessible in the SMBus/I 2 C
ILED1
Configuration Register 0x08 bit 2.
ILED2
ILED3
ILED4
t D1
t D1
t D1
5V Low Dropout Regulator
There is an internal 5V low dropout (LDO) regulator to develop the
necessary low-voltage supply, which is used by the chip’s internal
control circuitry. VDC is the output of this LDO regulator which
ILED5
t D1
requires a bypass capacitor of 1μF or more for the regulation.
The VDC pin can be used as a coarse reference as long as it is
t D2
t FPWM
sourcing only a few milliamps.
ILED0
t ON
t OFF
IC Protection Features and Fault
FIGURE 21. 6 EQUAL PHASE CHANNELS PHASE SHIFT ILLUSTRATION
13
Management
ISL97671A has several protection and fault management
features that improve system reliability. The following sections
describe them in more detail.
FN7709.3
November 30, 2012
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